disassembled Dragon 32 ROM ?

[jedie]

OK. i tried the tools form http://www.6809.org.uk/dragon/

I used the ROM from "Dragon Data Ltd - Dragon 32 - IC17.zip" and do this:

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$ ./6809dasm.pl org=0x8000 d32.rom > d32.asm
$ ./asm6809.pl --output=d32_asm6809.rom --listing=d32_asm6809.lst d32.asm

Then i compare the origin "d32.rom" with the recreated "d32_asm6809.rom"... They looks very similar, but are not 100% the same


EDIT: I created a python script to create "comment" line from the existing ROM info for 6809dasm.pl... Looks like this:

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./6809dasm.pl org=0x8000 \
comment=0x0,"BREAK message flag - if negative print BREAK" \
comment=0x1,"String delimiting char (0x22 '\"')" \
comment=0x2,"Another delimiting char (0x22 '\"')" \
comment=0x3,"General counter byte" \
...

Complete script to create a ROM Listing with all comments is here: https://github.com/6809/rom-info/blob/m ... d32_rom.sh

[jedie]

How to bring coco3.asm (e.g. from http://sourceforge.net/p/toolshed/code/ ... /coco3.asm ) which looks like:

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...
BLOCK7.6	EQU	$3E
BLOCK7.7	EQU	$3F
* Extended Color BASIC 2.0
ORG	$8000
MAGIC	FCC	'EX'
*
* MOVE EXTENDED BASIC'S COMMAND INTERPRETATION TABLE FROM ROM TO RAM
L8002	LDX	#L80DE	ROM ADDRESS
LDU	#COMVEC+10	RAM ADDRESS 
...

into a listing format, with comments like this:

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...
0171 fff6                    FIRQ      RMB  2               
0172 fff8                    IRQ       RMB  2               
0173 fffa                    SWI       RMB  2               
0174 fffc                    NMI       RMB  2               
0175 fffe                    RESETV    RMB  2               
0176                                                        
0177                                                        
0178                                                        
0179 db00                              ORG  $DB00           
0180                                                        
0181                         * CONSOLE IN                      
0182 db00 8d 03              LA171     BSR  KEYIN          GET A CHARACTER FROM CONSOLE IN 
0183 db02 27 fc                        BEQ  LA171          LOOP IF NO KEY DOWN 
0184 db04 39                           RTS                  
0185                                                        
0186                         *                              
0187                         * THIS ROUTINE GETS A KEYSTROKE FROM THE KEYBOARD IF A KEY                      
0188                         * IS DOWN. IT RETURNS ZERO TRUE IF THERE WAS NO KEY DOWN.                      
0189                         *                              
0190                         *                              
0191                         LA1C1                          
0192 db05 b6 a0 00           KEYIN     LDA  USTAT           
0193 db08 85 01                        BITA #1              
0194 db0a 27 06                        BEQ  NOCHAR    
...

[jedie]

I have used "sorchard" Dragon 64 Information and merge it with a disassembled rom, with the Perl scripts from http://www.6809.org.uk/dragon/

Now i have some missmatches, for this:

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$bb3c-$bb7e ; * reset routine continued
$bb3c       ; initialise PIA0:
$bb3f       ;        $FF00 PDR rrrrrrrr
$bb42       ;        $FF02 PDR wwwwwwww
$bb44       ;        CA2 bit3 output mode
$bb46       ;        CB2 bit3 output mode
$bb48       ;        IRQA disabled (hsync)
$bb49       ;        IRQB disabled (vsync)
$bb4f       ; initialise PIA1:
$bb52       ;        $FF20 PDR wwwwwwwr
$bb54       ;        $FF22 PDR wwwwwrrr
$bb56       ;        CA2 bit3 output mode
$bb57       ;        CB2 bit3 output mode
$bb59       ;        IRQA disabled (ack)
$bb5b       ;        IRQB disabled (cart)
$bb65       ; initialise serial hardware:
$bb68       ;        no parity, no IRQ, DTR low
$bb6b       ;        1200 baud, 8 data, 2 stop
$bb6e       ; initialise SAM:
$bb71       ;        512 byte display
$bb73       ;        display base 1024
$bb75       ;        mem page 0
$bb76       ;        slow MPU rate
$bb78       ;        64K dynamic memory
$bb7b       ;        MAP 0

From the code listing:

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BB39  0000                    neg     <$00
BB3B  00CC                    neg     <$cc
BB3D  0034                    neg     <$34
BB3F  8EFF00                  ldx     #$ff00  ; $FF00 PDR rrrrrrrr
BB42  A701                    sta     1,x     ; $FF02 PDR wwwwwwww
BB44  A703                    sta     3,x     ; CA2 bit3 output mode
BB46  A784                    sta     ,x      ; CB2 bit3 output mode
BB48  43                      coma            ; IRQA disabled (hsync)
BB49  A702                    sta     2,x     ; IRQB disabled (vsync)
BB4B  E701                    stb     1,x
BB4D  E703                    stb     3,x
BB4F  8EFF20                  ldx     #$ff20  ; initialise PIA1:
BB52  6F01                    clr     1,x     ; $FF20 PDR wwwwwwwr
BB54  6F03                    clr     3,x     ; $FF22 PDR wwwwwrrr
BB56  4A                      deca            ; CA2 bit3 output mode
BB57  A784                    sta     ,x      ; CB2 bit3 output mode
BB59  86F8                    lda     #$f8    ; IRQA disabled (ack)
BB5B  A702                    sta     2,x     ; IRQB disabled (cart)
BB5D  E701                    stb     1,x
BB5F  E703                    stb     3,x
BB61  6F84                    clr     ,x
BB63  6F02                    clr     2,x
BB65  CC0A98                  ldd     #$0a98  ; initialise serial hardware:
BB68  FDFF06                  std     >$ff06  ; no parity, no IRQ, DTR low
BB6B  B6FF04                  lda     >$ff04  ; 1200 baud, 8 data, 2 stop
BB6E  8EFFC0                  ldx     #$ffc0  ; initialise SAM:
BB71  C610                    ldb     #$10    ; 512 byte display
BB73  A781            L_BB73  sta     ,x++    ; display base 1024
BB75  5A                      decb            ; mem page 0
BB76  26FB                    bne     L_BB73  ; slow MPU rate
BB78  F7FFC9                  stb     >$ffc9  ; 64K dynamic memory
BB7B  F7FFDD                  stb     >$ffdd  ; MAP 0

The initialise PIA0 block seems to be wrong commented.

Are the addresses in "sorchard" "out of alignment" or does the perl scripts something wrong or have i use them wrong?

[sorchard]

Are the addresses in "sorchard" "out of alignment" or does the perl scripts something wrong or have i use them wrong?

It's nothing you or I have done. The problem is because the disassembly you're using is out of sync with the instructions.

There should be the instruction LDD #$0034 at address $bb3c. If you look closely you can see the bytes making up the correct instruction hidden in the NEG instructions.

The bytes from $bb35 to $bb3b are unused and this is what has caused the disassembly to lose sync.

[jedie]

Hm! OK, it seems that i have to add more informations to the perl script. Like "fcb=" and "fdb=", isn't it?

[sixxie]

Sounds like a bug in 6809dasm.pl to me - I'll check it out...

Edit: looks like 6809dasm.pl doesn't properly flag the illegal variant of NEG <indexed>, so it just looks like the legal version and assembles differently ($60 instead of $61). I'll look into fixing this in a bit.

[jedie]

I found http://www.6809.org.uk/tmp/da/d64_1.lis
And i quick hack a script to add the comments from mem-info to the listing with https://github.com/6809/rom-info/commit ... 0df8e16637

e.g.:

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python add_comments.py d64_1.lis d64_comments.lis --meminfo="Dragon 64 in 32 mode.txt"

The result is this: https://gist.github.com/anonymous/4b85bd8069a2bfaaea9f

[jedie]

From the code listing:

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BB39  0000                    neg     <$00
BB3B  00CC                    neg     <$cc
BB3D  0034                    neg     <$34
BB3F  8EFF00                  ldx     #$ff00  ; $FF00 PDR rrrrrrrr
BB42  A701                    sta     1,x     ; $FF02 PDR wwwwwwww
BB44  A703                    sta     3,x     ; CA2 bit3 output mode
BB46  A784                    sta     ,x      ; CB2 bit3 output mode
BB48  43                      coma            ; IRQA disabled (hsync)
BB49  A702                    sta     2,x     ; IRQB disabled (vsync)
BB4B  E701                    stb     1,x
BB4D  E703                    stb     3,x
BB4F  8EFF20                  ldx     #$ff20  ; initialise PIA1:
BB52  6F01                    clr     1,x     ; $FF20 PDR wwwwwwwr
BB54  6F03                    clr     3,x     ; $FF22 PDR wwwwwrrr
BB56  4A                      deca            ; CA2 bit3 output mode
BB57  A784                    sta     ,x      ; CB2 bit3 output mode
BB59  86F8                    lda     #$f8    ; IRQA disabled (ack)
BB5B  A702                    sta     2,x     ; IRQB disabled (cart)
BB5D  E701                    stb     1,x
BB5F  E703                    stb     3,x
BB61  6F84                    clr     ,x
BB63  6F02                    clr     2,x
BB65  CC0A98                  ldd     #$0a98  ; initialise serial hardware:
BB68  FDFF06                  std     >$ff06  ; no parity, no IRQ, DTR low
BB6B  B6FF04                  lda     >$ff04  ; 1200 baud, 8 data, 2 stop
BB6E  8EFFC0                  ldx     #$ffc0  ; initialise SAM:
BB71  C610                    ldb     #$10    ; 512 byte display
BB73  A781            L_BB73  sta     ,x++    ; display base 1024
BB75  5A                      decb            ; mem page 0
BB76  26FB                    bne     L_BB73  ; slow MPU rate
BB78  F7FFC9                  stb     >$ffc9  ; 64K dynamic memory
BB7B  F7FFDD                  stb     >$ffdd  ; MAP 0

Now it looks like this:

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BB35  00000000000000          fcb     $00,$00,$00,$00,$00,$00,$00 ; * unused
BB3C  CC0034          HWINIT  ldd     #$0034                 ; initialise PIA0:
BB3F  8EFF00                  ldx     #$ff00                 ; $FF00 PDR rrrrrrrr
BB42  A701                    sta     1,x                    ; $FF02 PDR wwwwwwww
BB44  A703                    sta     3,x                    ; CA2 bit3 output mode
BB46  A784                    sta     ,x                     ; CB2 bit3 output mode
BB48  43                      coma                           ; IRQA disabled (hsync)
BB49  A702                    sta     2,x                    ; IRQB disabled (vsync)
BB4B  E701                    stb     1,x
BB4D  E703                    stb     3,x
BB4F  8EFF20                  ldx     #$ff20                 ; initialise PIA1:
BB52  6F01                    clr     1,x                    ; $FF20 PDR wwwwwwwr
BB54  6F03                    clr     3,x                    ; $FF22 PDR wwwwwrrr
BB56  4A                      deca                           ; CA2 bit3 output mode
BB57  A784                    sta     ,x                     ; CB2 bit3 output mode
BB59  86F8                    lda     #$f8                   ; IRQA disabled (ack)
BB5B  A702                    sta     2,x                    ; IRQB disabled (cart)
BB5D  E701                    stb     1,x
BB5F  E703                    stb     3,x
BB61  6F84                    clr     ,x
BB63  6F02                    clr     2,x
BB65  CC0A98                  ldd     #$0a98                 ; initialise serial hardware:
BB68  FDFF06                  std     >$ff06                 ; no parity, no IRQ, DTR low
BB6B  B6FF04                  lda     >$ff04                 ; 1200 baud, 8 data, 2 stop
BB6E  8EFFC0                  ldx     #$ffc0                 ; initialise SAM:
BB71  C610                    ldb     #$10                   ; 512 byte display
BB73  A781            L_BB73  sta     ,x++                   ; display base 1024
BB75  5A                      decb                           ; mem page 0
BB76  26FB                    bne     L_BB73                 ; slow MPU rate
BB78  F7FFC9                  stb     >$ffc9                 ; 64K dynamic memory
BB7B  F7FFDD                  stb     >$ffdd                 ; MAP 0

[jedie]

Edit: Added D32 ROM disassembly

Great! -> viewtopic.php?f=5&t=4370&start=10#p11378

TODO: Merge the info: https://github.com/6809/rom-info/issues/1