IRQ issues

A place to discuss everything Dragon related that doesn't fall into the other categories.
pser1
Posts: 1342
Joined: Sun Mar 25, 2012 7:32 pm
Location: Barcelona (SPAIN)

Re: IRQ issues

Post by pser1 » Fri Mar 03, 2017 3:52 pm

sixxie wrote:25 lines are inserted when vertical blanking starts, and another 25 appear 23 scanlines after the active area. On the '64, it delays the HS rising edge as seen by the PIA by 25 lines
Yes if you have the IRQ triggering on FS falling edge; that happens just after the active area, so you do indeed then have 120 scanlines to do stuff in before the raster hits the top of the next active area.
Hi Ciaran,
I forgot to comment something about those 120 lines ...
The D32 creates the extra 50, but despite D64 does not, I asume that the elapsed time is well respected,
so I *can* use the same 'extra' number of cycles: 120x57x2 (if double speed poke), so 13,680 cycles
thanks a lot
pere

pser1
Posts: 1342
Joined: Sun Mar 25, 2012 7:32 pm
Location: Barcelona (SPAIN)

Re: IRQ issues

Post by pser1 » Tue May 02, 2017 2:03 pm

Hello,
I have been testing (roughly) the timing of these HS on XRoar emulation (D32 and D64) and with my real Dragons D32 and D64
The results are the same for each machine, so
@Ciaran
Congratulations for your impressive XRoar that really mimics both machines :shock:
Surprisingly, testing on MAME178, the Dragon 64 emulation didn't lose any HS, it did not even flicker when Basic sets double speed!
The code I used was this:

Code: Select all

                00010                      org   $5500
                00011             ; -------------------------------------------------------------------------------------
5500 1A50       00012 [3]     3   start    orcc  #$50       ; disable interrupts
5502 86FF       00013 [2]     5            lda   #$ff       ; put $ff
5504 1F8B       00014 [6]     11           tfr   a,dp       ; as direct page
     FF         00015                      setdp $ff        ; let compiler know  
5506 9601       00016 [4]     15           lda   <$01       ; get Pia0 side A config 
5508 D603       00017 [4]     19           ldb   <$03       ; get Pia0 side B config 
550A FD5540     00018 [6]     25           std   save+1     ; save values to be restored before exiting
550D 8605       00019 [2]     27           lda   #$05       ; set bits 0 and 2 - bit 0 set   -> IRQ to CPU enabled
                00020                                       ;                  - bit 1 reset -> falling edge
550F 9701       00021 [4]     31           sta   <$01       ; to detect HS falling edge (line begin)
5511 9703       00022 [4]     35           sta   <$03       ; to detect FS falling edge (screen end)
                00023             ; -------------------------------------------------------------------------------------
5513 8E57CE     00024 [3]     38           ldx   #fArea+2   ; point to Data Area
5516 4F         00025 [2]     40           clra             ; create a zero
5517 5F         00026 [2]     42           clrb             ; two bytes long
5518 ED83       00027 [5+3]   50  clean    std   ,--x       ; clear 2 bytes
551A 8C554C     00028 [4]     54           cmpx  #wArea     ; done all data area?
551D 22F9       00029 [3]     57           bhi   clean      ; no, loop
                00030             ; -------------------------------------------------------------------------------------
551F CE0000     00031 [3]     60           ldu   #$00       ; reset counter
5522 9602       00032 [4]     64           lda   <$02       ; clear FS IRQ flag
5524 9603       00033 [4]     68  wFS01    lda   <$03       ; received FS?
5526 2AFC       00034 [3]     71           bpl   wFS01      ; no, wait
5528 9602       00035 [4]     75           lda   <$02       ; clear FS IRQ flag
552A 9600       00036 [4]     79           lda   <$00       ; clear HS IRQ flag
                00037             
                00038                      opt   cc         ; reset totals
552C 9603       00039 [4]     4   wHS01    lda   <$03       ; received new FS?
552E 2B0C       00040 [3]     7            bmi   noMore     ; yes, exit
5530 3341       00041 [4+1]   12           leau  1,u        ; increment counter
5532 9601       00042 [4]     16           lda   <$01       ; received HS?
5534 2AF6       00043 [3]     19           bpl   wHS01      ; no, wait
                00044             
5536 9600       00045 [4]     23           lda   <$00       ; clear HS IRQ flag
5538 EF81       00046 [5+3]   31           stu   ,x++       ; save counter, increment pointer
553A 20F0       00047 [3]     34           bra   wHS01      ; loop back
                00048             ; -------------------------------------------------------------------------------------
553C FF57CC     00049 [6]     40  noMore   stu   fArea      ; saves last used counter value
553F CC0000     00050 [3]     43  save     ldd   #$0000     ; get received config values
5542 9701       00051 [4]     47           sta   <$01       ; restore PIA0 side A
5544 D703       00052 [4]     51           stb   <$03       ; restore PIA0 side B
5546 4F         00053 [2]     53           clra             ; get value zero
5547 1F8B       00054 [6]     59           tfr   a,dp       ; set as direct page
5549 1CAF       00055 [3]     62           andcc #$af       ; enable interrupts
554B 39         00056 [5]     67           rts              ; return
                00057             ; -------------------------------------------------------------------------------------
554C 0's	00058             wArea    zmb   (312+8)*2  ; space enough for 312 words plus 8 (extra margin)
Then I used this Basic program to execute it and send output to the printer

Code: Select all

100 LOAD"CTRHS04.BIN":CLOSE
110 P=&H554C:LP=0:Z1=0:POKE&HFFD7,0
120 IFLP=0THEN250
130 FORI=0TO39:FORJ=0TO15 STEP2
140 Z2=PEEK(P+16*I+J)*256+PEEK(P+16*I+J+1)
150 IFZ2=0THENZ3=0ELSE Z3=Z2-Z1
160 PRINT USING"%  %";HEX$(Z3);
170 IFLP=1THEN PRINT #-2,USING"%  %";HEX$(Z3);
180 Z1=Z2:NEXT:IFLP=1THENPRINT #-2,""
185 IF I<39 THEN200
190 IFINKEY$<>"C"THEN190 ELSE210
200 FORW=1TO200:NEXT
210 NEXT
220 PRINT"LAST U:";HEX$(PEEK(P+640)*256+PEEK(P+641))
230 IF LP=1 THEN PRINT #-2,"LAST U:";HEX$(PEEK(P+640)*256+PEEK(P+641))
240 IFINKEY$<>"C"THEN240
250 POKE&HFFD9,0:EXEC&H5500:POKE&HFFD8,0
260 LP=1:GOTO130
The printed data for the Dragon64 (to see the big gaps) is this

Code: Select all

6   5   5   6   5   5   5   5   
6   5   5   5   5   6   5   5   
5   6   5   5   5   5   6   5   
9B  5   5   6   5   5   5   5   
9C  5   5   5   6   5   5   5   
5   6   5   5   5   5   6   5   
5   5   5   6   5   5   5   6   
5   5   5   5   6   5   5   5   
5   6   5   5   5   5   6   5   
5   5   6   5   5   5   5   6   
5   5   5   5   6   5   5   5   
5   6   5   5   5   6   5   5   
5   5   6   5   5   5   5   6   
5   5   5   5   6   5   5   5   
6   5   5   5   5   6   5   5   
5   5   6   5   5   5   5   6   
5   5   5   6   5   5   5   5   
6   5   5   5   5   6   5   5   
5   5   6   5   5   5   6   5   
5   5   5   6   5   5   5   5   
6   5   5   5   5   6   5   5   
5   6   5   5   5   5   6   5   
5   5   5   6   5   5   5   5   
6   5   5   5   6   5   5   5   
5   6   5   5   5   5   6   5   
5   5   5   6   5   5   5   6   
5   5   5   5   6   5   5   5   
5   6   5   5   5   5   6   5   
5   5   6   5   5   5   5   6   
5   5   5   5   6   5   5   5   
5   6   5   5   5   6   5   5   
5   5   6   5   5   5   5   6   
5   5   5   5   6   5   0   0   
0   0   0   0   0   0   0   0   
0   0   0   0   0   0   0   0   
0   0   0   0   0   0   0   0   
0   0   0   0   0   0   0   0   
0   0   0   0   0   0   0   0   
0   0   0   0   0   0   0   0   
0   0   0   0   0   0   0   0   
You can see here that there are two very long gaps, 25 pulse width each one. They appear after the first 24 normal pulses and again after some more 8
Values are in hexadecimal. The value differences 5-6 I asume are due to the used loop being a bit long.

The results for a D32 don't show a different pattern for the 'extra' pulses, I mean it is much the same than the one for the regular ones.
The printed data for the Dragon32 is this

Code: Select all

6   5   5   5   6   5   5   5   
5   6   5   5   5   5   6   5   
5   5   6   5   5   5   5   6   
5   5   5   5   6   5   5   5   
5   6   5   5   5   6   5   5   
5   5   6   5   5   5   5   6   
5   5   5   5   6   5   5   5   
6   5   5   5   5   6   5   5   
5   5   6   5   5   5   5   6   
5   5   5   6   5   5   5   5   
6   5   5   5   5   6   5   5   
5   5   6   5   5   5   6   5   
5   5   5   6   5   5   5   5   
6   5   5   5   5   6   5   5   
5   6   5   5   5   5   6   5   
5   5   5   6   5   5   5   5   
6   5   5   5   6   5   5   5   
5   6   5   5   5   5   6   5   
5   5   5   6   5   5   5   6   
5   5   5   5   6   5   5   5   
5   6   5   5   5   5   6   5   
5   5   6   5   5   5   5   6   
5   5   5   5   6   5   5   5   
5   6   5   5   5   6   5   5   
5   5   6   5   5   5   5   6   
5   5   5   5   6   5   5   5   
6   5   5   5   5   6   5   5   
5   5   6   5   5   5   5   6   
5   5   5   6   5   5   5   5   
6   5   5   5   5   6   5   5   
5   5   6   5   5   5   6   5   
5   5   5   6   5   5   5   5   
6   5   5   5   5   6   5   5   
5   6   5   5   5   5   6   5   
5   5   5   6   5   5   5   5   
6   5   5   5   6   5   5   5   
5   6   5   5   5   5   6   5   
5   5   5   6   5   5   5   6   
5   5   5   5   6   5   5   5   
0   0   0   0   0   0   0   0   
regards
pere

pser1
Posts: 1342
Joined: Sun Mar 25, 2012 7:32 pm
Location: Barcelona (SPAIN)

Re: IRQ issues

Post by pser1 » Wed May 03, 2017 9:35 pm

sorchard wrote: tldr: someone messed up on the D64 layout and connected the PIA & SAM HS to the VDG hsync instead of the PAL hsync.
This also means that memory is not refreshed where the irqs are missing. I guess it doesn't matter that much or it would have been noticed before.
I think the easiest 'fix' for a D64 would be to cut/lift the PIA pin (IC5 pin 40) and connect it with a flying wire to the video hsync (looks like IC18 pin 3 on the schematic). That would only fix the irq, not the refresh. No guarantees as it's not something I've attempted.
Hello, today I have decided to do that minor surgery on my Dragon64 ...
I cut the track that arrives to PIA IC5 pin 40 to isolate it. Then I ran three wires to a male three pins connector:
- from IC5 pin 40 to the central point
- from IC18 pin 3 to the left point
- from IC14 pin 9 to the right point
Then I put a jumper between central point and left point ...
I tested with the basic program / ml routine and there are *ALL* of the HS IRQs, great!!
Finally I tested a program that produces sound using the Simon Jonassen 2 voice player using the HS IRQ and sound is the 'same' I get with my Dragon 32

@Stew
thanks a bunch for sharing this idea :D
pere

simon
Posts: 163
Joined: Wed Nov 27, 2013 8:56 pm

Re: IRQ issues

Post by simon » Tue May 16, 2017 6:15 pm

OMG ! - you performed open heart surgery on your d64 to make my 2voice irq music work... i am humbled !!!!

:shock:

pser1
Posts: 1342
Joined: Sun Mar 25, 2012 7:32 pm
Location: Barcelona (SPAIN)

Re: IRQ issues

Post by pser1 » Tue May 16, 2017 10:03 pm

simon wrote:OMG ! - you performed open heart surgery on your d64 to make my 2voice irq music work... i am humbled !!!!
:shock:
Why should you?
I think that your 2-voice IRQ routine is *SO* good that the Dragon 64 *MUST* be corrected to sound as nice as a Dragon32 :-)

cheers
pere

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