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Question on Opcode behaviour

Posted: Mon Apr 21, 2025 11:47 pm
by robcfg
Hello, dear friends!

I was tinkering with the MAME disassembler and noticed something interesting.

This is a regular DEC opcode:

Code: Select all

7a ff 00        DEC    $FF00
And this is technically the same opcode, but it's prefixed by the page 2 opcode:

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10 7a 09 00     DEC    $0900
But there's no opcode $7a on page 2. So, what does the processor do? Look on page 1? Panic? :mrgreen:

Would it work the same with a page 3 prefix ($11), or would it look on page 2 and then page 1?

Cheers,
Rob

Re: Question on Opcode behaviour

Posted: Tue Apr 22, 2025 4:23 am
by tlindner

Re: Question on Opcode behaviour

Posted: Tue Apr 22, 2025 4:38 am
by tlindner
I originally wanted to disassemble the mnemonics a little differently, but I couldn't get buy in from the other MAMEDevs.

Code: Select all

10 7a 09 00           DEC_2      $0900
10 11 7a 09 00        DEC_23     $0900
10 11 10 7a 09 00     DEC_232    $0900

Re: Question on Opcode behaviour

Posted: Tue Apr 22, 2025 12:58 pm
by robcfg
Very interesting!

I was making a simple disassembler for fun and using MAME's to double check my work. that's when this "inconsistencies" showed up.

Regarding the undefined instructions, I was a bit confused because I didn't know that the 'X' meant indeed undefined and couldn't find any info on them. On mine I've decided for the time being to prefix them with a lowercase 'u' as this clearly breaks the normal naming convention for the opcodes, making them more apparent.

Thanks for the links! There are a lot of details I didn't knew about the 6809.

Re: Question on Opcode behaviour

Posted: Mon Apr 28, 2025 11:40 pm
by robcfg
Hi Tim!

I found your nice 6309 indexed mode postbyte chart (https://tlindner.macmess.org/wp-content ... counts.pdf) and I'd like to ask if it includes the original 6809 postbytes, or if there are some that behave in a different way.

Cheers!

Re: Question on Opcode behaviour

Posted: Tue Apr 29, 2025 3:55 am
by tlindner
The 6309 indexed addressing mode opcodes added to the existing 6809 indexed addressing modes without changing how the 6809 codes worked.

Re: Question on Opcode behaviour

Posted: Tue Apr 29, 2025 7:53 am
by robcfg
Niiiiiice!

Then your table is going to be very handy :mrgreen:

Thank you very much!

Re: Question on Opcode behaviour

Posted: Thu May 01, 2025 10:26 am
by robcfg
Hi Tim!

I'm going through your table and noticed that postbyte $8A (F,X) is marked as having another byte following it, while $AA (F,Y) does not.

Is that an actual useless byte that only affects the ,X form or is it a typo in the table?

All other Register,Register combinations don't have any following byte.

Re: Question on Opcode behaviour

Posted: Thu May 01, 2025 11:29 am
by robcfg
I've also noticed (by comparing my disassembly with MAME's) that I'm showing opcode 0xCD as LDQ Immediate (according to the instruction set) while MAME shows:

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31f0: cd              XHCF
Could it be that XHCF is used if its prefixed by $10 or $11?

Re: Question on Opcode behaviour

Posted: Fri May 02, 2025 12:03 am
by robcfg
I may have found another error in MAME's disassembler.

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0f5b: 10 4a           DECA
0x4A is DECA, but 0x104A is DECD instead.