viewtopic.php?f=6&p=12786#p12786
It concerns the interesting possibility of creating a low cost cartridge containing extra memory plus a memory management unit (MMU)
@Tormod
I agree, it makes sense to design for the D32 as this should also be compatible with the D64.
Your solution for detecting vector fetch is nice and simple. Just in case there is some peculiar instruction sequence that can upset things I came up with a longer trigger sequence that has the advantage of not requiring the vectors point to any particular address:
1. xxxx (Any address)
2. xxxx-1
3. xxxx-2
4. ffff (One or more nVMA cycles)
5. fffx
6. fffx+1
7. ffff
This should be triggered by IRQ, FIRQ, NMI & SWI plus handle CWAI.
Steps 1-3 detect the final three stacking cycles. Step 4 can take more than 1 cycle during CWAI.
I searched for a while and couldn't find any examples of other people trying this technique, so I guess we have a chance of being the first to find out the hard way
![Smile :-)](./images/smilies/icon_e_smile.gif)